Chapter 2: Important ISE Design Suite 13 Release Information
?Analysis Enhancements
PlanAhead release 13 provides better visualization of clock and timing paths.
?
Hierarchical Design Methodology Support
?
Team Based Design Support
PlanAhead 13 adds support for new team-based design methodology. Team based
design supports multiple engineers implementing at a module level within a
design to work in parallel. The flow then supports assembling the module level
runs by a team leader at the top level with support for preservation levels to
control the placement and routing information that is kept during import.
See the Hierarchical Design Methodology Guide (UG748) and Chapter 13,
Hierarchical Design Techniques in the PlanAhead User Guide (UG632) for more
information.
?
Partial Reconfiguration Support
?
PlanAhead provides an interface to Partial Reconfiguration with appropriate
licensing.
See the Partial Reconfiguration User Guide (UG702) for more information.
ISE Simulator
?
Recompile and Relaunch simulation
?
You can now edit files, re-compile, and re-launch a simulation within the ISE
Simulation GUI
?
Full Access to Hardware Co-Simulation
?
?
The limited customer access restrictions have been removed.
An additional license is no longer required.
?
Design Environment Integration
?
You can now launch ISim from PlanAhead and Project Navigator.
?
ISim User Guide Improvements
XPS
?
?
There is a new section on Hardware Co-Simulation.
The Tcl Commands chapter has been re-organized.
?
?
?
?
?
?
?
?
All software development tools have been removed from XPS.
AXI based MicroBlaze designs are always built using instruction and data caches.
The main toolbar has been streamlined and now contains fewer buttons.
Create and Import IP (CIP) wizard now supports creation of AXI4 and AXI4-Lite slave
peripherals.
AXI BFMs project generation now included in CIP wizard.
ELF files can now be assigned for implementation or simulation and remain
synchronized with Project Navigator.
Debug Wizard supports inclusion of AXI monitors and hardware/software co-debug
of AXI-based designs.
When the XPS design is a submodule in a Project Navigator project, simulation is only
available in Project Navigator.
26
ISE Design Suite 13: Release Notes Guide
UG631 (v 13.1)
相关PDF资料
EF-EDK-FL SOFTWARE EDK EMBED FLOAT
EF-ISE-DSP-FL SOFTWARE ISE DSP EDITION
EF-ISE-SYSTEM-FL ISE DESIGN SYST FLOATING LICENSE
EF-VIVADO-HLS-FL VIVADO HLS, FLOATING LICENSE
EFM32-GXXX-PTB BOARD PROTOTYPING FOR EFM32
EFS315 FUSE INDUST 315A 415V BS IEC
EHBNCSCB CONN EH BNC T/H SOLDER CUP BLK
EHE004 BOARD ENERGY HARVESTING
相关代理商/技术参数
EF-DSP-PC-NL 功能描述:SOFTWARE SYS GEN FOR DSP RoHS:是 类别:编程器,开发系统 >> 软件 系列:ISE® 设计套件 标准包装:1 系列:ISE® 设计套件 类型:订阅 适用于相关产品:Xilinx FPGAs 其它名称:Q4986209T1081384
EFDSS645B25A 制造商:Panasonic Industrial Company 功能描述:DELAY LINE
EFDST645B15B 制造商:Panasonic Industrial Company 功能描述:DELAY LINE
EFE01A 制造商:未知厂家 制造商全称:未知厂家 功能描述:THYRISTOR MODULE|BRIDGE|HALF-CNTLD|CC|200V V(RRM)
EFE01A-F 制造商:未知厂家 制造商全称:未知厂家 功能描述:THYRISTOR MODULE|BRIDGE|HALF-CNTLD|CC|200V V(RRM)
EFE01A-S 制造商:未知厂家 制造商全称:未知厂家 功能描述:THYRISTOR MODULE|BRIDGE|HALF-CNTLD|CC|200V V(RRM)
EFE01A-SE 制造商:未知厂家 制造商全称:未知厂家 功能描述:THYRISTOR MODULE|BRIDGE|HALF-CNTLD|CC|200V V(RRM)
EFE01B 制造商:CRYDOM 制造商全称:Crydom Inc., 功能描述:Power Modules